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D-Bug & Automation Forum >> Coding >> (M)ST(E) Double VBL (TwinSync) Bug and Solution
http://d-bug.mooo.com/dbugforums/cgi-bin/yabb2/YaBB.pl?num=1233561593 Message started by CJ on 02.02.09 at 07:59:52 |
Title: Re: Remo's speed issue Post by Klapauzius on 03.02.09 at 21:56:21 remowilliams wrote on 03.02.09 at 21:28:22:
I don't think so. 8Mhz and cache on is physically impossible on the Mega STE - the hardware does not allow it. That's also the reason you won't find this setting in the CPX module. |
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